EDN

PCI Express x1 PHY supports source synchronous and DDR clocking

Dallas, Tex.— Texas Instruments Inc.'s PCI Express (PCIe) x1 physical layer (PHY) chip has hit the market in volume, providing a low-cost PCI Express endpoint device for a wide variety of sectors such ...
Design-Reuse

LSI Logic Unveils Industry's Highest Speed DDR-2 SDRAM Physical Layer Memory Interface

- High speed DDR-2 interface core and I/O provide customers a physical layer solution that is easily integrated into their ASIC - Cuts time, cost and complexity of OEM product development - Capability ...
Business Wire

MIPI Alliance Completes Development of A-PHY v1.0, an Industry-Standard Long-Reach SerDes Physical Layer Interface for Automotive Applications

PISCATAWAY, N.J.--(BUSINESS WIRE)--The MIPI Alliance, an international organization that develops interface specifications for mobile and mobile-influenced industries, today announced that development ...
Business Wire

MIPI D-PHY v3.0 Doubles Data Rate of Physical Layer Interface While Extending Power Efficiency

PISCATAWAY, N.J.--(BUSINESS WIRE)--The MIPI Alliance, an international organization that develops interface specifications for mobile and mobile-influenced industries, today announced a major update ...
Yahoo Finance

Faraday Delivers DDR/LPDDR Combo PHY IP Solutions on UMC’s 22ULP and 14FFC

HSINCHU, Taiwan, July 22, 2025--(BUSINESS WIRE)--Faraday Technology Corporation (TWSE: 3035), a leading ASIC design and IP provider, today announced the availability of its DDR/LPDDR combo PHY, ...
Electronic Design

Tektronix delivers LPDDR4 PHY layer test solution

September 23, 2014. Tektronix has announced a complete PHY layer and conformance test solution for JEDEC LPDDR4, the next generation of mobile memory technology. Slated for adoption starting in 2015, ...
EDN

MIPI M-PHY takes center stage

The script for the M-PHY specification was written inside the MIPI (Mobile Industry Processor Interface) Alliance by a working group made up of member companies, and set up to expand the capabilities ...
Electronic Design

Cadence and Denali Double-Team Advanced DDR-PHY Methodology

The combined resources of Cadence Design Systems and Denali Software have resulted in an advanced double-data-rate (DDR) PHY methodology based on Cadence’s Encounter digital IC design platform. The ...